In preparation for the Xilinx Adapt Virtual Technology Series (March 24–25, 2021), the Xilinx Data Center Group has unveiled a new hardware platform, the Alveo SN1000 SmartNIC, as well as “Smart World” AI video analytics, low-latency electronic trading, and the Xilinx FPGA app store.
The new Xilinx Alveo 100 Gb/s “composable” SN1000 PCIe card. Image used courtesy of Xilinx
According to Xilinx, the SN1000 is the industry’s first fully-composable SmartNIC solution, capable of adapting to changing data center requirements as quickly as it takes to deploy new software revisions.
Will Composable Architecture Drive the Future of Data Centers?
In an All About Circuits briefing with Xilinx representatives, VP of Marketing Pejman Roshan revealed the pain points the new Alveo SN1000 is solving. “I could have an entire data center that can run a single app on Monday and overnight switch to a completely different application on Tuesday,” Roshan explains. “That different application might have different compute requirements, different storage requirements, and different networking requirements.”
A solution to these conflicting requirements, Xilinx asserts, is composable architectures.
IBM defines composable architectures as logical software building blocks that deliver functions such as compute, storage, and networking—but with the added ability to provision new infrastructure on demand.
Composability is a key feature that ties together all the Xilinx solutions released today.
New SmartNIC Places Composability as Centerpiece
ASIC implementations, as well as CPU/SoC architectures, simply fall short of the flexibility requirements in the dynamic modern data center. The reason for this limitation is simple. There are many market hyperscalers and cloud service providers who all have different requirements in compute, network, and storage.
Kartik Srinivasan, Networking and Storage Business Lead for the Xilinx Data Center Group, says that composability is the biggest distinction between this SmartNIC and others.
The SN1000 is a PCIe packaged in a full-height, half-length standardized form factor, which consumes up to 75 W, offering two-channel 100 Gb off-load capability.
Two examples of composability (red) and flexibility in base FPGA architecture (blue), which may allow engineers to build custom off-loads or extend existing IP. Image (modified) courtesy of Xilinx
The card itself is based upon the Xilinx 16nm UltraScale+ FPGA fabric and a 16-core Arm processor. Xilinx explains that the FPGA fabric is the source of the composability for the SN1000, offering flexible offloading requirements related to networking, security, and storage.
Software-defined Hardware? FPGA Development for all Engineers
While FPGAs are (typically) notoriously difficult to program, Xilinx says it has built accessibility into the hardware-level of the SN1000. Further, the SmartNIC acknowledges that workhorse languages for FPGA development, Verilog and VHDL RTL, are still alive and kicking.
Xilinx is combining its Vitis development platform with higher-level languages like the P4 codebase to streamline data-plane development. This may ease engineers who are more accustomed to higher-level software development into FPGA development.
By abstracting away the complexity of bare-metal programming in favor of high-level languages, Xilinx says it is introducing FPGAs to a new generation of engineers. Image used courtesy of Xilinx
Software teams already familiar with development on the Arm platforms with C and C++ can more easily come up to speed with P4 and Vitis to program the data-plane features of the FPGA.
Perks of Alveo Hardware for Edge Compute
In the past year, data centers have undergone heightened demand for bandwidth and data processing as many employees have begun working from home to combat the pandemic. One way to alleviate this burden is through edge device hardware acceleration.
Xilinx says its Alveo product family of hardware accelerator devices can benefit multiple industries:
- Global incident and emergency management systems
- Worker safety
- Retail loss prevention (due to errors and misappropriation)
- Hospital response and monitoring
The Push for Composable Data Centers and Accessible FPGAs
FPGAs, which Xilinx has described as “born to run” in data centers, are uniquely suited to provide massively-parallel data processing. This capability reduces the total cost of ownership of edge-compute devices and improves performance with a low-latency response.
As an example of a success story, Xilinx claims that the Tencent Cloud Service Provider was able to reduce its bandwidth costs by 90% between edge and cloud by combining technologies from Xilinx and partner Aupera.
High-performance edge-device video analytic compute capability, deployable “out-of-the-box” with the Alveo product family. Image used courtesy of Xilinx
The new Xilinx launch of the Alveo SN1000 indicates two major trends involving data center hardware. First, the concept of composability may be the key to driving data center agility. The announcement also reveals how FPGA development is going mainstream with higher-level abstraction of the hardware, which eases development.
Do you work with FPGAs in your career? Are you an RTL fan or have you had the opportunity to work with hardware abstraction APIs? Let us know in the comments below.
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